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Mark Will's blog

29

Apr

2013

This week I've managed to test out the rotation code on a video and early results look promising. Now I've got to start working on XY translation and getting the code to support videos instead of two frames. Then I can compare it to other implementations.

19

Apr

2013

This week has been a productive one, I managed to get the rotation between two frames using SIFT key features but the results weren't as good as I would of liked. So I tired another method using the frequency domain which is giving better results, currently the code is in python so I'll have to rewrite it in C next week.

09

Apr

2013

This past week I've spent most of my time on other assignments but I have been looking into the connection machine as one option for my fpga implementation plus finishing of the matching of frames in the video stabilisation algorithm.

27

Mar

2013

Had a few doubts about my image feature detector but it turns out the test image I was using didn't work on other implementations either. I am now
getting descriptors of the features and this week will be focused on matching these descriptors with others.

20

Mar

2013

The last week was spent reading through papers related to my project and then writing my proposal. This week I'm planning on working on my SIFT implementation which currently can find key points in an image, but now needs to match images.

11

Mar

2013

Currently I'm trying to find the rotation between two images. I'm not bothered with speed yet, just trying to get it working. I've spent the last week working on finding key points in an image using the SIFT algorithm. Next I have to match these key points between the two images to hopefully find the rotation.

04

Feb

2013

I've now managed to join up the system to the FPGA so you can configure the NTP core from linux running on the zedboard. The configuration registers are now connected to the ntp core and so it doesn't send bad packets when a settings changes, the changes in the registers only apply to the ntp core when it's in an idle state (interframe gap). The settings can be changed easily from a little c program I wrote which uses Jack's driver to talk to the registers in the FPGA. We had to make a few changes to the driver so it supports lseek and writes the bytes in the correct order for the hardware to use the data correctly. Now the biggest set back is getting the GPS interface working.We've already spent a while on this but trying to find out where the problem is, is taking a while.

21

Jan

2013

This week I've managed to get the NTP code running on the Zedboard and have fixed the UDP checksum error I was getting last week. I've tested it with over 2000 requests and it responded perfectly each time. Since that was only one client sending requests, I also tested it with two clients and it worked perfectly as well. Now I've got to get the NTP code joined with the software stuff Jacks done and then we're close to having a working NTP server.

13

Jan

2013

This week I've managed to get the NTP code running on the zedboard and from some basic testing is working well. Just a few bugs at the moment which I'm trying to fix. Everything's working in simulation but when it's on the board, now and then the udp checksum is failing. I think I've fixed it but haven't tested it yet since the Xilinx tools seems to be building the code different causing timing to fail.

18

Dec

2012

This week I've got the NTP code running on the Zedboard since the Ethernet daughter cards turned up. It is currently responding to arp requests however ntp requests aren't working at the moment and after some quick testing, I think somewhere the IP address is hardcoded. So over the break I'll have to find where that is then hopefully it should be working at the hardware level. Merry Christmas and Happy New Year :)